H309802

U.S. Department of Homeland Security Washington, DC 20229 U.S. Customs and Border Protection May 27, 2020 HQ H309802 OT:RR:CTF:VS H309802 CMR CATEGORY: Origin Barbara Broussard, Esq. Sidley Austin LLP 1501 K Street N.W. Washington, D.C. 20005 RE: Country of origin of transistors Dear Ms. Broussard: This is in response to your request, on behalf of your client, STMicroelectronics, Inc. (“ST”), for a ruling on the country of origin of silicon carbide metal-oxide-semiconductor transistors manufactured using silicon carbide substrates. You indicate that your client previously declared the country of origin of the product as China, but based upon a recent review of the processing operations, it now believes the correct country of origin is Italy. The request is related to duty assessment and whether the imported product is subject to Section 301 duties as a product of China. You have requested confidential treatment be accorded to certain information submitted in connection with this matter. In consideration of the request and sufficient justification presented pursuant to 19 CFR 177.2(b)(7), the request for confidential treatment is approved. Information for which confidentiality is being accorded is not referenced in this ruling. FACTS: “ST designs, develops, manufactures, and markets semiconductor products used in various microelectronic applications.” The imported product consists of two silicon carbide metal-oxide-semiconductor transistors (hereinafter, transistors) encapsulated in a plastic-metallic package. Each transistor is 4.9 x 4.49mm² in dimension and has a thickness of 180 micrometers. You indicate that packaging the transistors makes for easier handling and assembling into their final application. You describe the production process of the transistors as comprising three stages, i.e., the substrate construction, the front end operations, and the back end operations. The substrate construction occurs in the United States. You describe the production process for the substrate as involving seven distinct steps starting with procuring high quality silicon carbide powder and ending with the creation of silicon carbide substrates, also known as “empty” wafers. ST procures the “empty” wafers from an unrelated U.S. manufacturer. The empty wafers are shipped to ST Italy where the front end operations occur. You describe these operations as six steps of processing – inspection of the silicon carbide substrates, or empty wafers; EPY (epitaxial) growth; visual inspection; marking; fabrication; and EWS (an electrical test). You indicate that the first step, visually inspecting the substrates and producing Certificates of Analyses, accepting the substrate batch, takes a full day for two highly skilled laborers, mainly engineers, to complete. The second step, processing each substrate through automated silicon carbide epitaxial film growth equipment takes approximately one week per lot, which may consist of multiple batches, and requires 16 highly skilled and qualified employees. You describe the processing of the substrates as follows: ST Italy places the substrates in a furnace for a high temperature Chemical Vapor Deposition (“CVD”) using silicon, carbide, and a nitrogen dopant. CVD is a deposition method, wherein the substrate is exposed to chemical reactions. During this process, ST Italy grows thin SiC epitaxial film on the substrate, creating SiC wafers. . . . After the EPY growth process, all silicon carbide wafers are submitted “to a full-surface, high-sensitivity, automated defect inspection through the use of state-of-the-at advanced surface inspection equipment.” You indicate this inspection takes one day per lot and requires two highly skilled and qualified employees to complete. Next, ST Italy laser marks the wafers on both sides to ensure traceability, which allows ST to track the wafers as they are further processed. At this point, the wafers are ready to be fabricated into the transistors. The fabrication process is described as consisting of six main sub-processes: oxide deposition, photolithography, etching, ion implantation, diffusion, and metal deposition. You indicate that this fabrication process takes about nine weeks per batch and involves 146 highly skilled and qualified employees. You describe the fabrication process as follows: First, ST Italy creates a thin insulator layer through the deposition of tetraethyl orthosilicate (“TEOS”). ST Italy uses TEOS as a crosslinking agent in silicon polymers. ST Italy evenly applies a light-sensitive polymer, also known as photoresist, while spinning the wafer. This material is originally soluble in an organic solvent, but allows the polymers to crosslink when exposed to light, making the affected regions insoluble. Second, ST Italy brings a glass mask, containing the patterns it wishes to transfer, in close proximity to the wafer. The glass mask essentially is a “negative” of one layer of the microcircuit. ST Italy then exposes the proximate glass makes and wafer to ultra-violet light. Where the mask is transparent, the photoresist becomes insoluble. ST Italy develops the wafers by removing the non-exposed areas of the photoresist. ST Italy eventually verifies the efficacy of these critical lithographic process steps through the automatic measurements of lithographic geometries. Third, ST Italy then further develops the wafer by removing the exposed photoresist and heats the wafer to harden the remaining photoresist pattern. ST Italy then exposes the wafer to a chemical solution or plasma (gas discharge) so that areas not covered by the hardened photoresist are etched away. ST Italy then subjects the exposed area to a wide range of recurring process steps for introducing dopant, such as ion implantation or activation. Fourth, in the ion implantation stage, ST Italy introduces dopants as ions into the material. The ion implantation system directs and sweeps a beam of purified ions over the semiconductor surface. The acceleration of the ions determines how deep they will penetrate the material, while the beam current and the exposure time determine the dosage. Fifth, ST Italy places the wafers in a quartz tube embedded in a heated furnace. The high temperatures of the furnace, typically 900ºC to 1100ºC, activate the dopants into the silicon carbide structure or growth oxide interface. Sixth, ST Italy loads the wafers into metal deposition equipment that allows the realization of electrical connections between the different cells of the MOS [metal-oxide-semiconductor] field-effect transistor. ST Italy uses the same equipment to deposit a metal layer, composed of titanium, nickel, and silver on the backside of the wafer. You indicate that after the fabrication process, the wafers contain fully formed and fully functional silicon carbide metal-oxide-semiconductor transistors, or dice. After the fabrication process, the dice on the wafers are tested using the EWS (Electrical Wafer Sorting) test to check the performance and functionality of the silicon carbide metal-oxide-semiconductor transistors. Transistors that are working sub-optimally are marked and subsequently discarded when the dice are singularized. ST Italy checks the transistors for quality assurance/quality control and packs them in specific boxes for shipment to the final point of processing. The testing and packing process done in Italy requires one week per batch and involves 24 highly skilled and qualified employees. You indicate that the Front End operations performed in Italy take 11 weeks and represent 95% of the processing time. At the end of this processing, customers can use the transistor because its electrical, thermal and mechanical features are finalized. While the transistor at issue is only sold to one customer, you point out that in the case of similar transistors, some customers purchase them at this stage of processing. Other customers, similar to the purchaser of the transistors at issue, prefer to purchase tra

The country of origin of a good is the country in which the good last underwent a substantial transformation. See 19 CFR § 134.1(b). “A substantial transformation test is used in a number of different trade-related situations, including compliance with the country of origin marking statute, allowance of drawback, and qualification for GSP status.” See SDI Technologies, Inc. v. United States, 21 C.I.T. 895, 897 n.2, 977 F.Supp. 1235, 1239 n.2 (CIT 1997). In this case, a substantial transformation test is used to determine the origin of the transistors at issue for purposes of duty assessment. A substantial transformation is said to have occurred when an article emerges from a manufacturing process with a name, character, or use which differs from the original material subjected to the process. United States v. GibsonThomsen Co., Inc., 27 C.C.P.A. 267 (C.A.D. 98) (1940); Texas Instruments v. United States, 681 F.2d 778, 782 (1982). In this case, silicon carbide substrates, also known as “empty” wafers, are processed in Italy to create transistors. We agree with counsel that the processing in Italy results in a substantial transformation as the “empty” wafers are not usable in that form, but only serve as a foundation upon which the transistors are created through the various processing steps which occur in Italy. After the fabrication process in Italy, the silicon carbide substrates have a new name, character and use. After the processing in Italy, they are usable as transistors and known as such or as dice. The processing that occurs in China, i.e., the dicing and packaging of the transistors does not change the function or character of the transistors. It merely separates multiple transistors on the wafer and packages them for easier handling and use. The situation here is akin to that in SDI Technologies, Inc. v. United States, supra. In SDI Technologies, unhoused printed circuit board assemblies with face-plate incorporating components for radio receivers [and]